Various transfer protocols have evolved over the years. Many of these transfer protocols have adopted a layered perspective of a communications model. Layered models allow implementers to define communications services in an abstract manner. Such abstraction allows definition of varying levels of communication service between users. And because the lowest levels of communication models are used to define the management of a physical medium, abstract definitions of communication services may easily be ported to varying network types.
One popular communications model is the Open Systems Interconnect (OSI) protocol stack. The OSI protocol stack defines communication services in terms of seven distinct layers. Attachment to a physical medium is governed by a Layer 1 definition. The Layer 1 definition establishes requirements for attaching to a physical medium and describes the lowest level of communications service across that medium. Typically, this lowest level of communications service comprises transfer of information from one device to another using a physical address and a primitive data format. This Layer 1 definition is typically referred to as the physical, or “PHY” layer.
At the Layer 2 level of the OSI model, data packets are encoded and decoded into bits. Layer 2 embodies transmission protocol knowledge and management and handles errors in the physical layer, flow control and frame synchronization. Layer 2, which is also known as the data link layer, is divided into two sub-layers. The first sub-layer is often referred to as Media Access Control (MAC). The second Layer 2 sub-layer is the Logical Link Control (LLC) layer. The MAC sub-layer controls how a device on a network gains access to the data and obtains permission to transmit. The LLC layer controls frame synchronization, flow control and error checking. In many systems, the MAC sub-layer is tightly integrated with PHY layer.
Because Layer 1 and Layer 2 of the OSI model are so tightly integrated, hardware implementations of network interfaces typically combine PHY, MAC and LLC functionality into a single device. At the physical layer, a stream of digital bits representing data arrives at a network interface device. The physical layer may also define how digital bits are encoded when they are propagated over a communications medium. In one example system, digital information may be encoded using a non-return to zero encoding. In other systems, a 4B/5B (four data bits out of a 5 bit symbol) encoding process may be used to provide higher bandwidth with inherent clocking of data transferred across the medium.
The network interface device may construct packets of data that higher levels of the communications model can use to convey information. In a typical network interface device, the digital bits may be accumulated to form small building blocks. These may be used to construct the data packets used by the higher levels of the communications model. This is typically referred to as Layer 1 framing. In one known embodiment, Layer 1 framing results in packing sequentially arriving digital bits into 8-bit bytes. This Layer 1 framing function will typically comprise a method for determining the start of a data frame.
As the Layer 1 framing function assembles data bytes, they are typically assembled into data packets by a Layer 2 function called delineation. Layer 2 delineation may also entail error checking and/or correction capabilities that enable the detection/correction of bit errors in the assembled packet. The Layer 2 delineation function typically adheres to a particular data packet format that may comprise not only data, but an error checking and/or correction field as well.
The traditional wisdom in the design and implementation of network interface devices has typically called for the segregation of Layer 1 framing and Layer 2 delineation functionality. One reason for this is simplicity in design. By segregating these functions, one simple state machine could be used to accumulate arriving bits into data bytes. These are typically stored in a first data buffer. A second state machine then retrieves the data bytes from the first buffer and assembles them into data packets in a second buffer. Another motivation for maintaining the segregation is pipelining. As new data arrives in the first buffer, a previously assembled data packet could be extracted from the second data buffer.
One disadvantage to these segregated designs is the need for additional data buffering storage. One data buffer is typically needed for assembly of bytes from the serial bit stream arriving at the network interface device. Once all of the bytes were assembled, a second buffer memory is needed to assemble data packets. These duplicate resources are, in a word, wasteful. Twice the buffer memory means twice the silicon real-estate. This results in lower chip yields because a network interface device will comprise many more transistors that otherwise required. Another disadvantage of such conventional designs is that they require additional power for the second buffer memory.